; CS617 Chapter 08 r013 candidate -- Tiny / PerfMon donor guest.
; Source of record: tiny.zip/artifacts/bench2ROM.s, Tiny 0.1b.
; Preserves r012 timer/count/display; adds BRK-only cooperative scan at rollover.
; CH08 adaptation: nonblocking raw BRK scan once each 4096 iterations.
; No firmware OFFCHK/CRTKY in loop; no MENU decoding or wait for input.
; Does NOT replace donor source or claim benchmark numeric comparability.
; ROM2:4000h target. No other application code owns 4000..41FF.
        ORG     &H4000

T8_LEFTPOS:  EQU     &H0020
T8_RIGHT0:   EQU     &H008E
T8_RIGHT1:   EQU     &H018E
T8_RIGHT2:   EQU     &H028E
T8_SPLASHPOS: EQU    0

T8_CLEAR4:
        DB      "                                "
        DB      "                                "
        DB      "                                "
        DB      "                                "
        DB      0

T8_SPLASH:
        DB      "                        Xandrian"
        DB      "                       Tiny 0.1b"
        DB      "                                "
        DB      "                                "
        DB      0

; ============================================================
; T8_PRINTZ -- proven normal/small-character path from helloROM
;
; Input:
;   IZ -> zero-terminated string
;   $6 = firmware character cursor
; ============================================================

T8_PRINTZ:
        LDI     $7,(IZ+$SX)
        LD      $0,$7
        DIU     $7
        DID     $0
        OR      $7,$SZ
        RTN     Z
        CAL     &H0197
        JR      T8_PRINTZ

T8_ENTRY:
; CH08 inherited entry boundary, NOT original Tiny startup. Card selected.
; One owner of CM header/vector and cold/warm restart: CH08 shell.
        PRE     SS,SSPTP
        PRE     US,USPTP
        PST     UA,&H14
        CAL     CH08_INIT
        CAL     CH08_ARM_BRK
; Tiny donor's original two display surfaces and start state.
        LD      $6,T8_SPLASHPOS
        PRE     IZ,T8_CLEAR4
        CAL     T8_PRINTZ
        LD      $6,T8_SPLASHPOS
        PRE     IZ,T8_SPLASH
        CAL     T8_PRINTZ

LDW     $26,0
        CAL     T8_POSLEFT
        LDW     $0,0
        CAL     T8_PRN3

T8_NEW_WINDOW:
        CAL     T8_GETTM
        LD      $24,$8
        LDW     $16,0
        LDW     $18,0
        LDW     $22,&H1000

T8_BENCH_LOOP:
        ; Timed counting core is unchanged from r012 and r011.
        ; Native BRK is not asynchronous in this card-ROM running state.
        ; No OFFCHK, MENU, or keyboard decoder in the counted core.

        CAL     T8_GETTM
        LD      $10,$8
        SBC     $10,$24
        JR      NZ,T8_WINDOW_DONE
        ADBW    $16,$SY
        LDW     $20,$16
        SBCW    $20,$22
        JR      NZ,T8_BENCH_LOOP
        ; BRK servicing is cooperative, not an asynchronous interrupt.
        ; Sample the proven card-side scanner once per 4096 iterations.
        ; It returns immediately without a key and never decodes MENU.
        ; On physical BRK it waits for release, then jumps CH08_WARM.
        ; Scanner writes $0-$2 and $17; reset $16/$17 AFTER it returns.
        CAL     CH08_RAWREADY
        LDW     $16,0
        ADBW    $18,$SY
        JR      T8_BENCH_LOOP

T8_WINDOW_DONE:
        LD      $25,$8

        LD      $8,$24
        CAL     T8_TMSEC
        LDW     $20,$10

        LD      $8,$25
        CAL     T8_TMSEC
        LDW     $22,$10

        LDW     $14,0
        LDW     $10,$20
        LDW     $12,1
        LDW     $28,240

T8_EL1:
        SBCW    $10,$22
        JR      Z,T8_ELDONE
        ADW     $10,$12
        ADW     $14,$12
        SBCW    $10,$28
        JR      NZ,T8_EL1
        LDW     $10,0
        JR      T8_EL1

T8_ELDONE:
        ADW     $26,$14

        LDW     $14,$26
        CAL     T8_BINBCD
        CAL     T8_POSLEFT
        LDW     $0,$8
        CAL     T8_PRN3

        LD      $14,$24
        LD      $15,0
        CAL     T8_BINBCD
        CAL     T8_POSR0
        LDW     $0,$8
        CAL     T8_PRN3

        CAL     T8_POSR1
        LDW     $0,$18
        CAL     T8_PRN3
        LDW     $0,$16
        CAL     T8_PRN3

        LD      $14,$25
        LD      $15,0
        CAL     T8_BINBCD
        CAL     T8_POSR2
        LDW     $0,$8
        CAL     T8_PRN3

        JP      T8_NEW_WINDOW

T8_POSLEFT:
        LD      $4,&H83
        LDW     $5,T8_LEFTPOS
        PPO     &HFF
        STLM    $4,3
        PPO     &HFE
        RTN

T8_POSR0:
        LD      $4,&H83
        LDW     $5,T8_RIGHT0
        PPO     &HFF
        STLM    $4,3
        PPO     &HFE
        RTN

T8_POSR1:
        LD      $4,&H83
        LDW     $5,T8_RIGHT1
        PPO     &HFF
        STLM    $4,3
        PPO     &HFE
        RTN

T8_POSR2:
        LD      $4,&H83
        LDW     $5,T8_RIGHT2
        PPO     &HFF
        STLM    $4,3
        PPO     &HFE
        RTN

T8_GETTM:
        GST     TM,$8
T8_GT1:
        LD      $9,$8
        GST     TM,$8
        SBC     $8,$9
        JR      NZ,T8_GT1
        LD      $9,0
        RTN

T8_TMSEC:
        LD      $10,$8
        AN      $10,&H3F
        LD      $12,$8
        AN      $12,&HC0
        SBC     $12,&H00
        JR      Z,T8_TS4
        SBC     $12,&H40
        JR      Z,T8_TS1
        SBC     $12,&H80
        JR      Z,T8_TS2
        LDW     $14,180
        ADW     $10,$14
        JR      T8_TS4
T8_TS1:
        LDW     $14,60
        ADW     $10,$14
        JR      T8_TS4
T8_TS2:
        LDW     $14,120
        ADW     $10,$14
T8_TS4:
        RTN

T8_BINBCD:
        LDW     $8,0
T8_BC1:
        ORC     $14,$15
        JR      Z,T8_BC2
        ADBW    $8,$SY
        SBW     $14,$SY
        JR      T8_BC1
T8_BC2:
        RTN

T8_PRN3:
        DIUW    $0
        LD      $3,3
T8_P3:
        DIUM    $0,3
        DIU     $2
        AD      $2,&H0F
        STL     $2
        SB      $3,$SY
        JR      NZ,T8_P3
        RTN